The switch matrix can connect the inputs and outputs of the CLB to the general routing matrix or to each other. Each CLB connects to a switch matrix that is responsible for connecting the CLB to the rest of the FPGA. The next size block in the FPGA is the Complex Logic Block ( CLB) and each CLB consists of two slices. The break down of the slices is roughly SLICEX 50%, SLICEL 25% and SLICEM 25%. A SLICEM is the same as a SLICEL except the LUTs can be used as 64bits of RAM or a shift register up to 32bits long. These help speed up circuits like addition and multiplication. A SLICEL is the same as a SLICEX except it contains extra hardware for a ripple-carry chain used in arithmetic circuits.
The SLICEX is the most basic type of slice and just consists of the four LUT6's and the eight flip-flops. In the Mojo's FPGA there are three types of slices, SLICEX, SLICEL, and SLICEM. The FPGA used by the Mojo has 1,430 slices in it for a total of 5,720 LUTs!Īll slices are not created equal, however. Some of the flip-flops can actually be configured as latches instead of flip-flops, although latches typically aren't good practice to use as they can lead to timing problems. These flip-flops are typically configurable allowing the type of reset (asynchronous vs synchronous) and the reset level (high vs low) to be specified. In the Spartan 6 used by the Mojo, a slice has 4 LUT6 and 8 flip-flops. Groups of LUTs and flip-flops are called slices. Flip-flops and SlicesĮach LUT's output can be optionally connected to a flip-flop. When it is configured as two 5-input LUTs, In is set to 0. The only restriction is that both 5-input LUTs must share the same inputs. The reason the LUT is designed this way is because it can either be used as a single 6-input LUT, or two 5-input LUTs. The output of the LUT is whatever value is in the indexed location in it's RAM.Īs an example let's look at a 2-input LUT.
What makes a LUT powerful is that you can program what the output should be for every single possible input.Ī LUT consists of a block of RAM that is indexed by the LUT's inputs. A LUT consists of some number of inputs and one output. Look-up tables are how your logic actually gets implemented. An FPGA has three main elements, Look- Up Tables ( LUT), flip-flops, and the routing matrix, that all work together to create a very flexible device. While this is a good way to explain it to someone with little prior knowledge on digital design, it's not actually how it works. When explaining what an FPGA is to someone, I commonly tell them that there are basically a bunch of logic gates in the FPGA that can be connected however you want to create your circuit. This tutorial will cover how an FPGA can implement so many different logic circuits simply by being reprogrammed.
0 kommentar(er)
